Nexperia 74LVC245APW,112, 1 Bus Transceiver, 8-Bit Non-Inverting LVTTL, 20-Pin TSSOP
Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
17 ns @ 1.2 V
Minimum Operating Temperature
-40 °C
Height
0.95mm
Dimensions
6.6 x 4.5 x 0.95mm
Minimum Operating Supply Voltage
1.2 V
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
6.6mm
Maximum Operating Supply Voltage
3.6 V
Width
4.5mm
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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BD 0.258
BD 0.258 Each (Exc. Vat)
BD 0.284
BD 0.284 Each (inc. VAT)
Standard
1
BD 0.258
BD 0.258 Each (Exc. Vat)
BD 0.284
BD 0.284 Each (inc. VAT)
Standard
1
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Please check again later.
| Quantity | Unit price |
|---|---|
| 1 - 4 | BD 0.258 |
| 5 - 9 | BD 0.248 |
| 10 - 24 | BD 0.242 |
| 25 - 49 | BD 0.220 |
| 50+ | BD 0.220 |
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Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
17 ns @ 1.2 V
Minimum Operating Temperature
-40 °C
Height
0.95mm
Dimensions
6.6 x 4.5 x 0.95mm
Minimum Operating Supply Voltage
1.2 V
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
6.6mm
Maximum Operating Supply Voltage
3.6 V
Width
4.5mm
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products