Nexperia 74LVC1G126GW,125 Buffer & Line Driver, 3-State, 5-Pin TSSOP
Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer, Line Driver
IC Type
Buffer & Line Driver IC
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
2.3 ns @ 2.7 V
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G/74LVC2G Family
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
BD 1.375
BD 0.028 Each (In a Pack of 50) (Exc. Vat)
BD 1.513
BD 0.031 Each (In a Pack of 50) (inc. VAT)
50
BD 1.375
BD 0.028 Each (In a Pack of 50) (Exc. Vat)
BD 1.513
BD 0.031 Each (In a Pack of 50) (inc. VAT)
50
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| Quantity | Unit price | Per Pack |
|---|---|---|
| 50 - 450 | BD 0.028 | BD 1.375 |
| 500 - 1200 | BD 0.028 | BD 1.375 |
| 1250 - 2450 | BD 0.028 | BD 1.375 |
| 2500 - 4950 | BD 0.028 | BD 1.375 |
| 5000+ | BD 0.022 | BD 1.100 |
Technical Document
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer, Line Driver
IC Type
Buffer & Line Driver IC
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
2.3 ns @ 2.7 V
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G/74LVC2G Family
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family