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Nexperia 74LVCH16245ADGG,11, Dual Bus Transceiver, 16-Bit Non-Inverting LVTTL, 48-Pin TSSOP

RS Stock No.: 356-0189PBrand: NexperiaManufacturers Part No.: 74LVCH16245ADGG,11
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Technical Document

Specifications

Logic Family

LVC

Logic Function

Bus Transceiver

Number of Elements per Chip

2

Number of Channels per Chip

16

Polarity

Non-Inverting

Mounting Type

Surface Mount

Package Type

TSSOP

Pin Count

48

Input Level

LVTTL

Output Level

LVTTL

Maximum High Level Output Current

-24mA

Maximum Low Level Output Current

24mA

Maximum Propagation Delay Time @ Maximum CL

2.2 ns @ 3.3 V

Height

1.05mm

Dimensions

12.6 x 6.2 x 1.05mm

Minimum Operating Temperature

-40 °C

Propagation Delay Test Condition

50pF

Maximum Operating Temperature

+125 °C

Length

12.6mm

Maximum Operating Supply Voltage

3.6 V

Width

6.2mm

Minimum Operating Supply Voltage

1.2 V

Country of Origin

Thailand

Product details

74LVCH Family

High Speed Low-Voltage CMOS Technology logic
Operating voltage 1.2 to 3.6V with 5V tolerant inputs/outputs
Bus Hold feature on inputs eliminates need for large pull-ups
Compatibility: Input LVTTL/TTL, Output LVCMOS

74LVCH Family

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BD 0.420

Each (Supplied on a Reel) (Exc. Vat)

BD 0.462

Each (Supplied on a Reel) (inc. VAT)

Nexperia 74LVCH16245ADGG,11, Dual Bus Transceiver, 16-Bit Non-Inverting LVTTL, 48-Pin TSSOP
Select packaging type

BD 0.420

Each (Supplied on a Reel) (Exc. Vat)

BD 0.462

Each (Supplied on a Reel) (inc. VAT)

Nexperia 74LVCH16245ADGG,11, Dual Bus Transceiver, 16-Bit Non-Inverting LVTTL, 48-Pin TSSOP
Stock information temporarily unavailable.
Select packaging type

Ideate. Create. Collaborate

JOIN FOR FREE

No hidden fees!

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  • Download and use our DesignSpark software for your PCB and 3D Mechanical designs
  • View and contribute website content and forums
  • Download 3D Models, Schematics and Footprints from more than a million products
Click here to find out more

Technical Document

Specifications

Logic Family

LVC

Logic Function

Bus Transceiver

Number of Elements per Chip

2

Number of Channels per Chip

16

Polarity

Non-Inverting

Mounting Type

Surface Mount

Package Type

TSSOP

Pin Count

48

Input Level

LVTTL

Output Level

LVTTL

Maximum High Level Output Current

-24mA

Maximum Low Level Output Current

24mA

Maximum Propagation Delay Time @ Maximum CL

2.2 ns @ 3.3 V

Height

1.05mm

Dimensions

12.6 x 6.2 x 1.05mm

Minimum Operating Temperature

-40 °C

Propagation Delay Test Condition

50pF

Maximum Operating Temperature

+125 °C

Length

12.6mm

Maximum Operating Supply Voltage

3.6 V

Width

6.2mm

Minimum Operating Supply Voltage

1.2 V

Country of Origin

Thailand

Product details

74LVCH Family

High Speed Low-Voltage CMOS Technology logic
Operating voltage 1.2 to 3.6V with 5V tolerant inputs/outputs
Bus Hold feature on inputs eliminates need for large pull-ups
Compatibility: Input LVTTL/TTL, Output LVCMOS

74LVCH Family

Ideate. Create. Collaborate

JOIN FOR FREE

No hidden fees!

design-spark
design-spark
  • Download and use our DesignSpark software for your PCB and 3D Mechanical designs
  • View and contribute website content and forums
  • Download 3D Models, Schematics and Footprints from more than a million products
Click here to find out more