Dual-use

Parallella Development Board Computer Board P1601-DK02

RS Stock No.: 819-4709Brand: ParallellaManufacturers Part No.: P1601-DK02
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Technical Document

Specifications

Classification

Computer Board

Technology

Development Board

Processor Family Name

Zynq + Epiphany III

Processor Part Number

Z-7010 + E16G301

Processor Type

MPU

Product details

Parallella-16 Desktop Computer, Epiphany III

The Parallella-16 Desktop Computer is an FPGA-based dual-core ARM Cortex-A9 single-board computer with an Epiphany III 16-core coprocessor chip. This credit card sized 'supercomputer' consumes less than 5W of power. The Parallella is a low-cost platform designed for developing and implementing high-performance applications for which parallel processing is ideally suited. Parallella boards are designed so that interconnection forming large clusters is straightforward.

Parallella Desktop Computer Board

• Xilinx Zynq®-7010 All Programmable SoC (XC7Z010) with dual-core ARM Cortex-A9 CPU
• Epiphany III (16-core CPU Accelerator)
• 1 GB DDR3 SDRAM
• 128 Mbit quad-SPI Flash memory
• RJ45 10/100/1000 Ethernet socket
• Micro HDMI port
• MicroSD card slot
• Micro USB 2.0 host port
• Four 60-pin high-speed expansion connectors ("PEC") for FPGA signals, Epiphany links and power distribution including 24 GPIO ports
• Power supply: +5 V @ 2 A via 2.1 mm centre-positive barrel socket
• Typical power consumption: less than 5 W
• Dimensions: 3.4 x 2.1 in
• Suitable power supply unit (not included): RS Part No. 706-6502

Epiphany III Coprocessor

• 16 x high-performance 32-bit RISC CPU cores
• Max operating frequency: 1 GHz (600 MHz on Parallella board)
• Peak performance @ 1 GHz: 32 GFLOPS
• On-chip distributed shared SRAM: 512 kB (32 kB/core)
• Local memory bandwidth: 512 GB/s
• Network on-chip Bisection bandwidth: 64 GB/s
• Off-chip bandwidth: 8 GB/s
• Maximum chip power consumption: 2 W
• IEEE-754 floating-point instruction set
• Fully featured ANSI-C/C++ programmable
• GNU/Eclipse based tool chain
• Source-synchronous LVDS off-chip links for host or direct chip-to-chip interfacing

Supplied with

Heatsink

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P.O.A.

Parallella Development Board Computer Board P1601-DK02

P.O.A.

Parallella Development Board Computer Board P1601-DK02
Stock information temporarily unavailable.

Technical Document

Specifications

Classification

Computer Board

Technology

Development Board

Processor Family Name

Zynq + Epiphany III

Processor Part Number

Z-7010 + E16G301

Processor Type

MPU

Product details

Parallella-16 Desktop Computer, Epiphany III

The Parallella-16 Desktop Computer is an FPGA-based dual-core ARM Cortex-A9 single-board computer with an Epiphany III 16-core coprocessor chip. This credit card sized 'supercomputer' consumes less than 5W of power. The Parallella is a low-cost platform designed for developing and implementing high-performance applications for which parallel processing is ideally suited. Parallella boards are designed so that interconnection forming large clusters is straightforward.

Parallella Desktop Computer Board

• Xilinx Zynq®-7010 All Programmable SoC (XC7Z010) with dual-core ARM Cortex-A9 CPU
• Epiphany III (16-core CPU Accelerator)
• 1 GB DDR3 SDRAM
• 128 Mbit quad-SPI Flash memory
• RJ45 10/100/1000 Ethernet socket
• Micro HDMI port
• MicroSD card slot
• Micro USB 2.0 host port
• Four 60-pin high-speed expansion connectors ("PEC") for FPGA signals, Epiphany links and power distribution including 24 GPIO ports
• Power supply: +5 V @ 2 A via 2.1 mm centre-positive barrel socket
• Typical power consumption: less than 5 W
• Dimensions: 3.4 x 2.1 in
• Suitable power supply unit (not included): RS Part No. 706-6502

Epiphany III Coprocessor

• 16 x high-performance 32-bit RISC CPU cores
• Max operating frequency: 1 GHz (600 MHz on Parallella board)
• Peak performance @ 1 GHz: 32 GFLOPS
• On-chip distributed shared SRAM: 512 kB (32 kB/core)
• Local memory bandwidth: 512 GB/s
• Network on-chip Bisection bandwidth: 64 GB/s
• Off-chip bandwidth: 8 GB/s
• Maximum chip power consumption: 2 W
• IEEE-754 floating-point instruction set
• Fully featured ANSI-C/C++ programmable
• GNU/Eclipse based tool chain
• Source-synchronous LVDS off-chip links for host or direct chip-to-chip interfacing

Supplied with

Heatsink