Technical Documents
Specifications
Brand
Renesas ElectronicsProduct Type
FIFO Memory
Organisation
512 x 9
Data Bus Width
9bit
Access Time
12ns
Mount Type
Surface
Minimum Supply Voltage
4.5V
Package Type
PDIP
Timing Type
Asynchronous
Pin Count
28
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Bus Direction
Bi-Directional
Maximum Operating Temperature
85°C
Height
2.79mm
Length
34.3mm
Standards/Approvals
No
Width
7.62mm
Series
IDT7201LA
Number of Bits per Word
9
Supply Current
80mA
Automotive Standard
No
Country of Origin
Thailand
Product Details
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Stock information temporarily unavailable.
BD 81.891
BD 5.849 Each (In a Tube of 14) (Exc. Vat)
BD 90.080
BD 6.434 Each (In a Tube of 14) (inc. VAT)
14
BD 81.891
BD 5.849 Each (In a Tube of 14) (Exc. Vat)
BD 90.080
BD 6.434 Each (In a Tube of 14) (inc. VAT)
Stock information temporarily unavailable.
14
| Quantity | Unit price | Per Tube |
|---|---|---|
| 14 - 14 | BD 5.849 | BD 81.891 |
| 28+ | BD 5.711 | BD 79.949 |
Technical Documents
Specifications
Brand
Renesas ElectronicsProduct Type
FIFO Memory
Organisation
512 x 9
Data Bus Width
9bit
Access Time
12ns
Mount Type
Surface
Minimum Supply Voltage
4.5V
Package Type
PDIP
Timing Type
Asynchronous
Pin Count
28
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Bus Direction
Bi-Directional
Maximum Operating Temperature
85°C
Height
2.79mm
Length
34.3mm
Standards/Approvals
No
Width
7.62mm
Series
IDT7201LA
Number of Bits per Word
9
Supply Current
80mA
Automotive Standard
No
Country of Origin
Thailand
Product Details
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
