Texas Instruments SN74LVC1G123DCTR Monostable Multivibrator 32mA, 8-Pin SM
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Monostable Multivibrator
Number of Elements per Chip
1
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Pulse Width
2.5 ns
Maximum Quiescent Current
20µA
Mounting Type
Surface Mount
Package Type
SM
Pin Count
8
Dimensions
3.15 x 2.9 x 1.2mm
Height
1.2mm
Length
3.15mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Maximum Operating Supply Voltage
5.5 V
Width
2.9mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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Stock information temporarily unavailable.
BD 2.784
BD 0.186 Each (In a Pack of 15) (Exc. Vat)
BD 3.062
BD 0.205 Each (In a Pack of 15) (inc. VAT)
Standard
15
BD 2.784
BD 0.186 Each (In a Pack of 15) (Exc. Vat)
BD 3.062
BD 0.205 Each (In a Pack of 15) (inc. VAT)
Stock information temporarily unavailable.
Standard
15
| Quantity | Unit price | Per Pack |
|---|---|---|
| 15 - 60 | BD 0.186 | BD 2.784 |
| 75 - 135 | BD 0.180 | BD 2.697 |
| 150 - 360 | BD 0.174 | BD 2.610 |
| 375 - 735 | BD 0.168 | BD 2.523 |
| 750+ | BD 0.162 | BD 2.436 |
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Monostable Multivibrator
Number of Elements per Chip
1
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Minimum Pulse Width
2.5 ns
Maximum Quiescent Current
20µA
Mounting Type
Surface Mount
Package Type
SM
Pin Count
8
Dimensions
3.15 x 2.9 x 1.2mm
Height
1.2mm
Length
3.15mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Maximum Operating Supply Voltage
5.5 V
Width
2.9mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products