Texas Instruments SN74LVC1G79DCKT D Type Flip Flop IC, 5-Pin SC-70
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
0.9mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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BD 0.365
Each (In a Pack of 5) (Exc. Vat)
BD 0.401
Each (In a Pack of 5) (inc. VAT)
Standard
5
BD 0.365
Each (In a Pack of 5) (Exc. Vat)
BD 0.401
Each (In a Pack of 5) (inc. VAT)
Standard
5
Buy in bulk
| quantity | Unit price | Per Pack |
|---|---|---|
| 5 - 20 | BD 0.365 | BD 1.825 |
| 25 - 95 | BD 0.285 | BD 1.425 |
| 100 - 245 | BD 0.185 | BD 0.925 |
| 250 - 495 | BD 0.180 | BD 0.900 |
| 500+ | BD 0.175 | BD 0.875 |
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
0.9mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products