Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Output Type
Push-Pull
Number of Elements per Chip
2
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
8 ns @ 30 pF
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
6
Logic Family
LVC
Dimensions
3.05 x 1.75 x 1.3mm
Maximum Operating Supply Voltage
5.5 V
Height
1.3mm
Maximum Operating Temperature
+125 °C
Length
3.05mm
Width
1.75mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
30pF
Product details
74LVC2G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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BD 0.120
Each (Supplied on a Reel) (Exc. Vat)
BD 0.132
Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
20
BD 0.120
Each (Supplied on a Reel) (Exc. Vat)
BD 0.132
Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
20
Buy in bulk
quantity | Unit price | Per Reel |
---|---|---|
20 - 80 | BD 0.120 | BD 2.400 |
100 - 180 | BD 0.115 | BD 2.300 |
200 - 480 | BD 0.110 | BD 2.200 |
500 - 980 | BD 0.100 | BD 2.000 |
1000+ | BD 0.095 | BD 1.900 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Output Type
Push-Pull
Number of Elements per Chip
2
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
8 ns @ 30 pF
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
6
Logic Family
LVC
Dimensions
3.05 x 1.75 x 1.3mm
Maximum Operating Supply Voltage
5.5 V
Height
1.3mm
Maximum Operating Temperature
+125 °C
Length
3.05mm
Width
1.75mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
30pF
Product details
74LVC2G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS