Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Line Driver
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
4.5 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Height
0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Length
2mm
Width
1.25mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
BD 1.238
BD 0.248 Each (In a Pack of 5) (Exc. Vat)
BD 1.362
BD 0.273 Each (In a Pack of 5) (inc. VAT)
Standard
5
BD 1.238
BD 0.248 Each (In a Pack of 5) (Exc. Vat)
BD 1.362
BD 0.273 Each (In a Pack of 5) (inc. VAT)
Stock information temporarily unavailable.
Standard
5
Stock information temporarily unavailable.
Quantity | Unit price | Per Pack |
---|---|---|
5 - 45 | BD 0.248 | BD 1.238 |
50 - 95 | BD 0.154 | BD 0.770 |
100 - 245 | BD 0.154 | BD 0.770 |
250 - 495 | BD 0.148 | BD 0.742 |
500+ | BD 0.148 | BD 0.742 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Buffer, Line Driver
Number of Channels per Chip
1
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
4.5 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Height
0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Length
2mm
Width
1.25mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22